Editors for VHDL, Verilog and SystemVerilog

VHDL, Verilog and SystemVerilog IDEs

In the last few years, we have seen the rise of several stand-alone integrated development environments (IDEs) — a.k.a VHDL, Verilog and SystemVerilog code browsers. Borrowing the concepts from software IDEs (Borland, Visual Studio, etc) these IDEs provide direct feedback about the code, and integration with simulators and/or synthesis tools.

  • Sigasi available commercially and as limited free edition, price from under $1000.
  • Mentor HDL Designer (high-end design creation, price over $10k)
  • SimplifIDE (available for free – no longer maintained)

In addition to these commercial IDEs, there are some experimental, academic open source VHDL, Verilog and SystemVerilog editors. They are all based on the Eclipse platform.
These projects can be used as Eclipse free VHDL/Verilog plugins, but may lack stability and maturity.

  • Veditor, open source VHDL eclipse plugin. Beta. EPL License
  • Signs, academic eclipse IDE, synthesis and simulation. Experimental. BSD License
  • ZamiaCAD, academic research project, successor of Signs, GPL License